Design of a Reconfigurable Matrix of Analog Processing Elements for AI
ABG-132411 | Thesis topic | |
2025-06-06 | Public funding alone (i.e. government, region, European, international organization research grant) |

- Electronics
- Computer science
- Engineering sciences
Topic description
The ARTISTE project aims to design a reconfigurable analog processor dedicated to the inference of convolutional neural networks (CNNs). In a context where the explosion of computational needs for artificial intelligence faces the energy limits of traditional digital architectures, ARTISTE explores a radically innovative approach: leveraging the physical properties of analog electronics to perform massively parallel computations with low power consumption.
At the heart of this project lies the development of a generic analog circuit capable of adapting its structure to different neural network models through a reconfigurable architecture inspired by FPGAs. The processor integrates analog computation blocks optimized for fundamental operations such as multiplication, accumulation, and convolution. These analog “cores” are interconnected to form flexible and dynamic operator networks, capable of adapting to the requirements of various CNN models. The objective of this thesis is to design this dynamic interconnection system, enabling versatile computation capabilities.
Research Objective
The main objective of this thesis is the design of the high-frequency, low-power matrix system for the circuit. In a previous thesis, an analog computation core based on a micro-MAC (Multiply-Accumulator) matrix was designed and fabricated. These Analog Tensor Cores (ATCs) will eventually be distributed across the circuit with a reconfigurable interconnection system. By integrating these ATCs into a flexible matrix, the goal of this thesis is to develop a circuit capable of dynamically mapping different neural network topologies while leveraging the energy efficiency and compactness of analog computation.
This promising approach paves the way for new AI computing paradigms, especially in domains where speed and low power consumption are critical, such as IoT systems. The system is conceptually inspired by the reconfigurable nature of digital FPGAs but fundamentally differs in that some signals will remain analog, requiring the design of a dedicated analog-digital interface.
This architecture introduces numerous scientific challenges and roadblocks:
- Designing an analog processor based on a matrix of analog computation elements at a scale compatible with AI requirements.
- Ensuring signal integrity between analog blocks, as well as between the analog computation matrix and the digital processor, without the interfacing becoming a system bottleneck.
- Maintaining low power consumption and consistently high signal transfer speeds, regardless of data spatial location.
- Strategically positioning the A/D and D/A converters.
Funding category
Funding further details
Presentation of host institution and host laboratory
LPC : Health, Environment and Energy department
This department is involved in projects which deal with wireless sensor network design and deployment for the environment [9]. It has expertise ranging from microelectronics design to data organization through sensor network deployment. In this study, it will be in charge of the design of the electronic system (different opportunity will be tested: Lora, Sigfox ZigBee ...) and the intelligent energy management as well as the interfacing of the data with the environmental cloud.
IP : département Image, Systèmes de Perception, Robotique
L'axe oeuvre dans le domaine de la Perception et de la Vision Artificielles pour la Commande des Systèmes Robotiques. Son objectif est donc le développement de concepts théoriques, méthodologiques et architecturaux pour la perception et le contrôle des systèmes. L'un des points forts reconnus actuellement est la reconnaissance automatique et suivi en temps réel de motifs visuels par des techniques d'apprentissage et plus particulièrement de réseaux de neurones profonds;
PhD title
Country where you obtained your PhD
Institution awarding doctoral degree
Graduate school
Double degree
YesCountry where the PhD was obtained in cotutelle
Establishment awarding the doctorate in cotutelle
Candidate's profile
De formation supérieure bac + 5, en école d’ingénieur ou en université dans le domaine de la microélectronique.(Maitrise de l'outil Cadence obligatoire). Vous possédez un sens de l’écoute, des capacités d’analyse et de synthèse et êtes méthodique. Vous avez un profil plutôt « analogicien » et vous montrez une appétence pour l’IA et l’apprentissage profond.
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