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Robust Sensors and Countermeasures Against X-Ray and Multimodal Physical Attacks

ABG-140238 Thesis topic
2026-09-15 Other public funding
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Grenoble INP - LCIS
Valence - Auvergne-Rhône-Alpes - France
Robust Sensors and Countermeasures Against X-Ray and Multimodal Physical Attacks
  • Electronics
  • Digital
  • Engineering sciences
Hardware security, X-ray attacks, multimodal attacks, countermeasures, security sensors, PUF, FPGA, total ionizing dose (TID).

Topic description

GALAXI is a collaborative research project funded by the ANR, coordinated by Paolo Maistri (TIMA laboratory), running for 48 months. It brings together six partners: TIMA (coordinator), CEA-Leti, SIMaP in Grenoble, LCIS in Valence, the Hubert Curien Laboratory in Saint-Étienne, and Mines Saint-Étienne in Gardanne. The project studies the effects of X-ray attacks on secure electronic circuits, alone or combined with other physical attack vectors, laser, electromagnetic, thermal, or side-channel.

 

Unlike classical fault models, X-ray attacks can cause permanent or semi-permanent changes to the component, related to total ionizing dose (TID) effects. They can be carried out while the component is powered off, and generate parametric drifts, increased leakage, threshold voltage shifts, and timing variations, which are poorly addressed by classical redundancy-based countermeasures.

 

The work will focus on two complementary strands, forming a defense chain against X-ray and multimodal attacks: detecting these attacks, including when the device is powered off, and then designing robust countermeasures.

 

1 — Offline and Cumulative Attack Sensors

  • Design and evaluate sensors capable of detecting X-ray exposure and combined attacks, including when the system is powered off.
  • Explore structures sensitive to total ionizing dose or to laser exposure, such as PUF-like structures or leakage-current-based sensors.
  • Design mechanisms able to record an attack that occurred while the system was powered off and to report it when the system restarts.

2 — Robust Countermeasures Against Multimodal Attacks

  • Evaluate existing countermeasures (masking, redundancy) against combined attack scenarios.
  • Design new countermeasures resilient to both transient and permanent effects, including parametric drifts and side-channel leakage amplification.
  • Prototype and validate these countermeasures on FPGA, also building on existing ASIC structures (ring oscillators, PUFs).

Both strands will build on the attack scenarios and complex-target characterizations developed in the project's other work packages, in particular the experimental campaigns carried out with the ESRF synchrotron X-ray source.

 

Starting date

2026-10-01

Funding category

Other public funding

Funding further details

ANR 2026

Presentation of host institution and host laboratory

Grenoble INP - LCIS

The LCIS (Laboratory of Design and Integration of Systems) is a public research laboratory affiliated with Grenoble INP - UGA and located in Valence, France. The lab specializes in the design of secure, reliable, and intelligent embedded systems.

Its research activities focus on several key areas:

Embedded systems security (hardware and software, fault injection, side-channel attacks, countermeasures)

Cyber-Physical Systems (CPS)

Real-time and autonomous systems

Signal and information processing for embedded applications

LCIS actively collaborates with academic and industrial partners in the fields of aerospace, automotive, IoT, and defense. It is involved in national and European research projects and supports technology transfer to industry.

The lab hosts around 80 researchers, faculty members, PhD students, and engineers in a dynamic and collaborative environment.

PhD title

Microélectronique et nanotechnologie

Country where you obtained your PhD

France

Institution awarding doctoral degree

UGA

Graduate school

Electronique, électrotechnique, automatique, traitement du signal

Candidate's profile

  • Master's degree (M2) or engineering degree in electronics, microelectronics, or embedded systems security.
  • Knowledge of hardware security is a plus: physical attacks, fault injection, side-channel analysis.
  • Skills in digital design (VHDL/Verilog) and hands-on FPGA prototyping.
  • Interest in experimental work and ability to collaborate within a consortium of six partner laboratories.
  • Good level of scientific English, both written and spoken.
2027-08-06
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